The present invention relates to an active matrix array device comprising an array of individually addressable matrix elements, first and second sets of crossing address conductors connected to the matrix elements, the array of matrix elements and the sets of address conductors being carried on a substrate, and an addressing circuit connected to the sets of row and column conductors for addressing the matrix elements and comprising a multiplexing circuit integrated on the substrate which is connected to the first set of conductors and has a plurality, n, of signal bus lines, the address conductors of the first set being arranged in a series of groups with each group comprising n successive address conductors and the multiplexing circuit being arranged to couple sequentially each group of address conductors to the signal bus lines with each address conductor in a group being coupled to a respective one of the bus lines, the addressing circuit further including a respective signal processing circuit connected to each bus line.
The matrix array device may, for example, be an active matrix liquid crystal (LC) display device. Such a device typically comprises an array of liquid crystal display elements each of which is connected to the output of a respective TFT (thin film transistor) to which gating (selection) and data (video information) signals are supplied by respective raw and column conductors. The addressing circuit consists of a row drive circuit connected to the row conductors for applying a gating signal to each row conductor in sequence to turn on the TFTs of each row of display elements in turn in respective row address periods and a column drive circuit connected to the set of column conductors for applying data signals to the column conductors in synchronism with scanning of the row conductors whereby the display elements of a selected row are charged via their respective TFTs to a level dependent on the value of the data signal existing on their associated column conductors to produce a required display effect. The TFTs usually comprise either amorphous silicon (a-Si) TFTs or polysilicon TFTs.
For convenience of manufacture and compactness, parts of the row and/or column drive circuits can be integrated on the substrate carrying the TFTs of the display elements peripherally of the display element array using the same large area electronics technology as that employed for the active matrix circuitry of the array with the circuitry of the drive circuit being fabricated simultaneously and similarly comprising TFTs, conductor lines—, etc. Due to limitations in operational performance of the TFTs and the kinds of circuit possible when using TFTs, the column drive circuit is customarily provided in the form of a simple multiplexing circuit, examples of which are described in U.S. Pat. No. 4,890,101, and the paper entitled “Fully Integrated Poly-Si TFT CMOS Drivers for Self-Scanned Light Valve” by Y. Nishihara et al in SID 92 Digest, pages 609–612. The operation of the column drive circuit is based on a multiplexing technique in which the video information (data) is sequentially transferred via multiplexing switches from a plurality of video input bus lines, to which video information is applied simultaneously, to corresponding groups or blocks of column conductors in the display with each column conductor in a group being connected via a multiplexer switch to a different video input line.
Commonly in polysilicon TFT display devices having an integrated column drive circuit this circuit is of an analog multiplexing type comprising groups of multiplexing switches, in the form of TFTs or CMOS gates, a set of video signal bus lines and a control circuit (normally comprising a shift register) which controls the operation of the multiplexer switches. Groups of video samples, constituting data, taken from an input video signal are applied to the video bus lines and the data is then transferred to corresponding groups of column conductors in the display array during a video line period, which corresponds to a row address period.
In known kinds of these display devices, the video information applied to the video bus lines is generated using external signal processing circuits (i.e. separate to the integrated multiplexing circuit), one such circuit being provided for each respective bus line, and which may consist of sample and hold circuits or digital to analog (D/A) converters.
It would be advantageous for additional circuit components of the address circuitry to be integrated on the device substrate in similar manner to the multiplexing circuit for example using TFTs etc formed by the same thin film technology employed for the active matrix array. The circuit components could then be fabricated simultaneously with the active matrix array thereby simplifying manufacture and reducing cost. Such integration would also lead to a more compact arrangement and reduce the number of external connections required.